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			26 lines
		
	
	
		
			340 B
		
	
	
	
		
			Python
		
	
	
	
	
	
			
		
		
	
	
			26 lines
		
	
	
		
			340 B
		
	
	
	
		
			Python
		
	
	
	
	
	
from opcodes import DIV, SHL, SHR
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from rule import Rule
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from z3 import BitVec
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"""
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Rule:
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DIV(X, SHL(Y, 1)) -> SHR(Y, X)
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Requirements:
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"""
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rule = Rule()
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n_bits = 32
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# Input vars
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X = BitVec('X', n_bits)
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Y = BitVec('Y', n_bits)
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# Non optimized result
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nonopt = DIV(X, SHL(Y, 1))
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# Optimized result
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opt = SHR(Y, X)
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rule.check(nonopt, opt)
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