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Do not use SAR instead of SDIV in shifts because it rounds differently

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This commit is contained in:
Alex Beregszaszi 2018-04-06 14:54:21 +02:00
parent c3608eaf90
commit 52c9441879
3 changed files with 10 additions and 7 deletions
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7
libsolidity/codegen/ABIFunctions.cpp
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@ -1439,17 +1439,18 @@ string ABIFunctions::shiftRightFunction(size_t _numBits, bool _signed)
solAssert(_numBits < 256, "");
string functionName = "shift_right_" + to_string(_numBits) + (_signed ? "_signed" : "_unsigned");
if (m_evmVersion.hasBitwiseShifting())
// NOTE: SAR rounds differently than SDIV
if (m_evmVersion.hasBitwiseShifting() && !_signed)
{
return createFunction(functionName, [&]() {
return
Whiskers(R"(
function <functionName>(value) -> newValue {
newValue := <shiftOp>(<numBits>, value)
newValue := shr(<numBits>, value)
}
)")
("functionName", functionName)
("shiftOp", _signed ? "sar" : "shr")
("numBits", to_string(_numBits))
.render();
});

5
libsolidity/codegen/CompilerUtils.cpp
View File

@ -1274,8 +1274,9 @@ void CompilerUtils::leftShiftNumberOnStack(unsigned _bits)
void CompilerUtils::rightShiftNumberOnStack(unsigned _bits, bool _isSigned)
{
solAssert(_bits < 256, "");
if (m_context.evmVersion().hasBitwiseShifting())
m_context << _bits << (_isSigned ? Instruction::SAR : Instruction::SHR);
// NOTE: SAR rounds differently than SDIV
if (m_context.evmVersion().hasBitwiseShifting() && !_isSigned)
m_context << _bits << Instruction::SHR;
else
m_context << (u256(1) << _bits) << Instruction::SWAP1 << (_isSigned ? Instruction::SDIV : Instruction::DIV);
}

5
libsolidity/codegen/ExpressionCompiler.cpp
View File

@ -1718,8 +1718,9 @@ void ExpressionCompiler::appendShiftOperatorCode(Token::Value _operator, Type co
m_context << u256(2) << Instruction::EXP << Instruction::MUL;
break;
case Token::SAR:
if (m_context.evmVersion().hasBitwiseShifting())
m_context << (c_valueSigned ? Instruction::SAR : Instruction::SHR);
// NOTE: SAR rounds differently than SDIV
if (m_context.evmVersion().hasBitwiseShifting() && !c_valueSigned)
m_context << Instruction::SHR;
else
m_context << u256(2) << Instruction::EXP << Instruction::SWAP1 << (c_valueSigned ? Instruction::SDIV : Instruction::DIV);
break;